面向SDN/NFV架构的VNF硬件加速资源编排机制

段通; 兰巨龙; 胡宇翔; 范宏伟

doi:10.11959/j.issn.1000-436x.2018108

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面向SDN/NFV架构的VNF硬件加速资源编排机制

学术论文 | 更新时间：2024-06-05

- 面向SDN/NFV架构的VNF硬件加速资源编排机制
- Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture
- 通信学报 2018年39卷第6期页码：98-108
- 作者机构：
  
  国家数字交换系统工程技术研究中心，河南郑州 450002
- 作者简介：
  
  [ "段通（1992-），男，河南驻马店人，国家数字交换系统工程技术研究中心博士生，主要研究方向为网络功能虚拟化、可编程网络硬件等。" ]
  [ "兰巨龙（1962-），男，河北张家口人，国家数字交换系统工程技术研究中心教授、博士生导师，主要研究方向为未来信息通信网络关键理论与技术。" ]
  [ "胡宇翔（1982-），男，河南周口人，博士，国家数字交换系统工程技术研究中心副教授，主要研究方向为未来网络关键技术、网络智慧化等。" ]
  [ "范宏伟（1994-），男，河南长葛人，国家数字交换系统工程技术中心硕士生，主要研究方向为网络功能虚拟化、硬件加速等。" ]
- 基金信息：
  
  国家网络空间安全专项基金资助项目(2017YFB0803204);国家高技术研究发展计划（“863”计划）基金资助项目(2015AA016102);国家自然科学基金创新群体基金资助项目(61521003)
- DOI：10.11959/j.issn.1000-436x.2018108
  中图分类号： TP393
- 网络出版日期：2018-06，
  
  纸质出版日期：2018-06-25
- 稿件说明：
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段通, 兰巨龙, 胡宇翔, 等. 面向SDN/NFV架构的VNF硬件加速资源编排机制[J]. 通信学报, 2018,39(6):98-108.

Tong DUAN, Julong LAN, Yuxiang HU, et al. Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture[J]. Journal on communications, 2018, 39(6): 98-108.
段通, 兰巨龙, 胡宇翔, 等. 面向SDN/NFV架构的VNF硬件加速资源编排机制[J]. 通信学报, 2018,39(6):98-108. DOI： 10.11959/j.issn.1000-436x.2018108.

Tong DUAN, Julong LAN, Yuxiang HU, et al. Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture[J]. Journal on communications, 2018, 39(6): 98-108. DOI： 10.11959/j.issn.1000-436x.2018108.

摘要

SDN/NFV架构中虚拟网络功能（VNF

virtual network function）的性能受限问题，使VNF的硬件加速机制成为研究热点。在部署硬件加速资源后，如何实现对硬件加速资源的统一管控和最优编排是亟待解决的问题。首先，提出了基于分离式控制的硬件加速资源统一管控架构；然后，将传统网络资源和硬件加速资源统一到网络模型中，并将硬件加速资源编排问题建模成基于线性约束的多目标优化问题；最后，设计了加速卡优先部署的启发式算法对问题进行求解。实验结果表明，与现有研究相比，所提机制能有效整合硬件加速资源，降低了近30%的处理时延。

Abstract

The hardware acceleration mechanism for VNF (virtual network function) is recently a hot research topic in SDN/NFV architecture because of the low processing performance of VNF.Once hardware acceleration resources have been plugged into the network

how to optimally mange and orchestrate these resources under service requirements remains a question to be solved.Firstly

a unified management architecture based on separated control for hardware acceleration resources was proposed.Then

traditional network topology together with hardware acceleration resources were modeled into a unified network model and then the hardware acceleration resource orchestration problem was transferred into a multi-objective linear programming problem.Finally

a hardware-accelerator-card-prior’ heuristic algorithm was designed.Experimental results show that compared with existing methods

the proposed orchestration mechanism can efficiently manage hardware acceleration resources and reduce the processing latency by 30%.

关键词

Keywords

references

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