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Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA
Campus Network Construction | 更新时间:2024-12-31
    • Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA

    • Journal on Communications   Vol. 45, Issue Z2, Pages: 108-112(2024)
    • DOI:10.11959/j.issn.1000-436x.2024257    

      CLC: TP393
    • Received:07 November 2024

      Published:30 November 2024

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  • YAO Renlong,ZHAO Qiong,HE Haitao,et al.Design and realization of a high-speed traffic collection and processing scheme for campus networks using FPGA[J].Journal on Communications,2024,45(Z2):108-112. DOI: 10.11959/j.issn.1000-436x.2024257.

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