Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture

Tong DUAN; Julong LAN; Yuxiang HU; Hongwei FAN

doi:10.11959/j.issn.1000-436x.2018108

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Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture

Papers | 更新时间：2024-06-05

- Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture
- Journal on Communications Vol. 39, Issue 6, Pages: 98-108(2018)
- 作者机构：
  
  国家数字交换系统工程技术研究中心，河南郑州 450002
- 作者简介：
- 基金信息：
  
  The National Network Security Special Program of China(2017YFB0803204);The National High Technology Research and Development Program of China (863 Program)(2015AA016102);The Innovation Group Program Project of National Natural Science Foundation of China(61521003)
- DOI：10.11959/j.issn.1000-436x.2018108
  CLC： TP393
- Online First：2018-06，
  
  Published：25 June 2018
- 稿件说明：
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Tong DUAN, Julong LAN, Yuxiang HU, et al. Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture[J]. Journal on Communications, 2018, 39(6): 98-108.
DOI：

Tong DUAN, Julong LAN, Yuxiang HU, et al. Orchestration mechanism for VNF hardware acceleration resources in SDN/NFV architecture[J]. Journal on Communications, 2018, 39(6): 98-108. DOI： 10.11959/j.issn.1000-436x.2018108.

摘要

SDN/NFV架构中虚拟网络功能（VNF

virtual network function）的性能受限问题，使VNF的硬件加速机制成为研究热点。在部署硬件加速资源后，如何实现对硬件加速资源的统一管控和最优编排是亟待解决的问题。首先，提出了基于分离式控制的硬件加速资源统一管控架构；然后，将传统网络资源和硬件加速资源统一到网络模型中，并将硬件加速资源编排问题建模成基于线性约束的多目标优化问题；最后，设计了加速卡优先部署的启发式算法对问题进行求解。实验结果表明，与现有研究相比，所提机制能有效整合硬件加速资源，降低了近30%的处理时延。

Abstract

The hardware acceleration mechanism for VNF (virtual network function) is recently a hot research topic in SDN/NFV architecture because of the low processing performance of VNF.Once hardware acceleration resources have been plugged into the network

how to optimally mange and orchestrate these resources under service requirements remains a question to be solved.Firstly

a unified management architecture based on separated control for hardware acceleration resources was proposed.Then

traditional network topology together with hardware acceleration resources were modeled into a unified network model and then the hardware acceleration resource orchestration problem was transferred into a multi-objective linear programming problem.Finally

a hardware-accelerator-card-prior’ heuristic algorithm was designed.Experimental results show that compared with existing methods

the proposed orchestration mechanism can efficiently manage hardware acceleration resources and reduce the processing latency by 30%.

关键词

Keywords

references

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Related Institution

Institute of Information Technology, Information Engineering University

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